Record Details
SPEDTAC : a digital computer for instructional use
ScholarsArchive at Oregon State University
| Field | Value |
|---|---|
| Title | SPEDTAC : a digital computer for instructional use |
| Names |
Fulmer, Allen Lee
(creator) Stone, Louis N (advisor) |
| Date Issued | 1963-08-02 (iso8601) |
| Note | Graduation date: 1964 |
| Abstract | The impact of the electronic computer on the teaching of mathematics, science, and engineering has created the need for a relatively low cost instructional digital computer. SPEDTAC (stored Program Educational Digital Transistorized Automatic Computer) was designed specifically to fulfill this need. The prototype described is a serial, solid state, single address, binary type stored program digital computer. The magnetic disc memory has a capacity of 256 thirteen bit words, with an average access time of 8.3 milliseconds. Registers are implemented from transistor flip-flops, and the diode-transistor NAND circuit is the principal logical gating element. Stroke and dagger functions are used to describe the logical design equations. PIug in printed circuit cards and a built in marginal testing facility provide ease of maintenance. There are no special cooling or power requirements. The computer has a repertoire of sixteen basic instructions which permit the handling of a wide variety of arithmetic and logical problems. A variety of programs and subroutines have been prepared and tested. Operation over a period of a year has shown reliability and results in the classroom to be good. Recommendation is made that consideration be given to doubling the word capacity of the memory in future models. |
| Genre | Thesis/Dissertation |
| Topic | Electronic digital computers |
| Identifier | http://hdl.handle.net/1957/48702 |
