Record Details
Logic circuit design of a 41-bit residue arithmetic unit
ScholarsArchive at Oregon State University
| Field | Value |
|---|---|
| Title | Logic circuit design of a 41-bit residue arithmetic unit |
| Names |
Routhieaux, Thomas Robert
(creator) Stone, Louis (advisor) |
| Date Issued | 1965-08-06 (iso8601) |
| Note | Graduation date: 1966 |
| Abstract | The application of residue notation is another approach for solving the problem of carry propagation in arithmetic units. Most other methods for solving this problem are based on changes in adder design and the use of improved components. Residue arithmetic has the inherent property of requiring no carries between moduli. This results in residue arithmetic requiring only a fraction of the carries necessary with conventional weighted arithmetic. The basic operations of addition, subtraction, multiplication, and division are incorporated in the design of a 41-bit residue arithmetic unit. Using only four moduli, addition and subtraction can be accomplished four times faster than conventional addition and subtraction using synchronous accumulators without carry-look-ahead techniques. Multiplication can be accomplished approximately sixteen times faster. In some cases, division is accomplished faster than conventional non-restoring division, On the average, however, residue division takes longer to accomplish than non-restoring conventional division. Detection of overflow in addition, subtraction, and multiplication is based on a slightly different approach for representing signed numbers. Monitoring multiplicative overflow after every multiplication reduces the speed of residue multiplication from sixteen to approximately twelve times faster than conventional multiplication. |
| Genre | Thesis/Dissertation |
| Topic | Electronic digital computers -- Circuits |
| Identifier | http://hdl.handle.net/1957/47820 |
