Record Details
Computer-aided majority logic design
ScholarsArchive at Oregon State University
| Field | Value |
|---|---|
| Title | Computer-aided majority logic design |
| Names |
Schiele, Roy Louis
(creator) Stone, Louis N. (advisor) |
| Date Issued | 1966-08-02 (iso8601) |
| Note | Graduation date: 1967 |
| Abstract | The emergence of the three-input majority gate as a practical element for logical design has demanded a useful method of design using these elements. In order to facilitate the use of this gate, a digital computer program is presented to implement the design procedure. Utilizing the truth table of a logical function, with "don't care" terms omitted, as the input, the program employs a unitizing method of function realization using three-input majority gates. The program complements and unitizes the table, and, using some fundamental theorems, reduces the table and selects the majority gate which gives maximum reduction. The reduction and gate selection processes continue until a final gate is obtained and the function is realized. The result is an efficient and relatively fast method of logical design employing three-input majority gates. The program was written in the FORTRAN II language for an IBM 1620 computer with 40K decimal digits of storage. In the form presented, it uses over 39K digits of storage. |
| Genre | Thesis/Dissertation |
| Topic | Logic, Symbolic and mathematical |
| Identifier | http://hdl.handle.net/1957/47337 |
