Record Details
Field | Value |
---|---|
Title | Design of a mini-computer controlled digital integrated circuit tester |
Names |
Fasang, Patrick Pad, 1941-
(creator) Amort, Donald L. (advisor) |
Date Issued | 1973-04-13 (iso8601) |
Note | Graduation date: 1974 |
Abstract | The purpose of the thesis is to design, construct, program, and test an automatic integrated circuit test system. The class of integrated circuits tested was restricted to digital integrated circuits. The general concept of testing a digital integrated circuit is based on the truth table of that circuit. A combination of logical ones and zeros is applied to the inputs of a digital integrated circuit, and the analog output is converted into a digital value by means of an analog-to-digital converter and is transferred to the memory of the mini-computer. The mini-computer compares the digitized value with some pre-determined limits and makes a decision based on the computer program stored inside its memory. Programming the mini-computer was done in machine language and the result of testing whether or not the digital integrated circuit under test met a given set of specifications was printed out on a teletypewriter connected to the minicomputer. The tester consists of a matrix switch, power supplies, a clock, logic circuitry, analog-to-digital and digital-toanalog converters, and a PDP-8/L mini-computer with an automatic send-receive teletypewriter. With the exception of the mini-computer with its teletypewriter and power supplies, the tester was designed, constructed, programmed, and tested, and it worked. Computer programs for testing some digital integrated circuits and their results of testing are shown in the Appendixes. Only a small variety of digital integrated circuits were tested by the tester, and the results indicated that the concept behind this testing procedure worked. Given enough time and hardware, it appears that this concept can be extended to test more varieties of integrated circuits. |
Genre | Thesis/Dissertation |
Topic | Integrated circuits |
Identifier | http://hdl.handle.net/1957/46097 |