Record Details

Hardware encryption using the MPC180 security co-processor

ScholarsArchive at Oregon State University

Field Value
Title Hardware encryption using the MPC180 security co-processor
Names Banerjee, Uday (creator)
KoƧ, Cetin Kaya (advisor)
Date Issued 2003-12-04 (iso8601)
Note Graduation date: 2004
Abstract Hardware cryptography offers a reliable way to provide security for data that is
sent over networks. Security processors have taken the stage in the movement for
secure computing. Some of the more prominent security processors belong to the
S1 family created by Motorola. The primary goal of this thesis is to document and
test the performance of one of these processors, the MPC180, by executing efficient
code for standard cryptographic algorithms. The MPC180 is a network security co-
processor which is capable of performing on-the-fly encryption of all network data,
thus adding an extra layer of security. This processor is capable of performing inten-
sive cryptographic computations, while offloading the burden of these computations
from the host processor, thus freeing up valuable resources on the host to perform
other functions. A real-time operating system (VxWorks) and its associated tools
(Tornado) were used to accurately examine and time the operation of the security
processor. The results are compared to other cryptographic hardware and software
implementations.
Genre Thesis
Topic Data encryption (Computer science)
Identifier http://hdl.handle.net/1957/10465

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